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Why does this diagram on CMOS switching show the ground voltage rising? (infosec.pub)
submitted 5 days ago* (last edited 5 days ago) by iliketurtiles@programming.dev to c/askelectronics@discuss.tchncs.de
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This is from a section on why decoupling capacitors should be attached to CMOS chips. It shows current spikes during transitions. Which then because of the inductance of traces connecting power to the chip, will cause the power rail voltage to droop.

But why is the ground voltage also shown to rise? What does it even mean for ground voltage to rise when ground is what voltage is measured against?

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[–] MotoAsh@piefed.social 4 points 5 days ago

This is just my 2c as a fledgling hobbyist and in no way an expert...

but ground isn't magic. It's just more of the circuit that's not intended to have an elevated voltage. The voltage spike is induced on the line just like any other inductance issue. It's important to be aware of what actually happens in a circuit instead of working off of odd assumptions, like "ground is always 0v".